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Global Mixed-mode Technology Inc.
G570
Dual-Slot PCMCIA/CardBus Power Controller
Features
Fully Integrated VCC and Vpp Switching for Dual Slot PC CardTM Interface 3-Lead Serial Interface Compatible With CardBusTM Controllers 3.3V Low Voltage Mode Meets PC Card Standards RESET for System Initialization of PC Cards 12V Supply Can Be Disabled Except During 12V Flash Programming Short Circuit and Thermal Protection 28 Pin and 30 Pin SSOP Compatible With 3.3V, 5V and 12V PC Cards Low RDS(on) (225-m 5V VCC Switch; 200 m 3.3V VCC Switch) Break-Before-Make Switching Internal power-On Reset
Description
The G570 PC Card power-interface switch provides an integrated power-management solution for two PC Cards. All of the discrete power MOSFETs, a logic section, current limiting, and thermal protection for PC Card control are combined on a single integrated circuit (IC). The circuit allows the distribution of 3.3V, 5V, and/or 12V card power by means of the Serial interface. The current-limiting feature eliminates the need for fuses, which reduces component count and improves reliability. The G570 features a 3.3V low voltage mode that allows for 3.3V switching without the need for 5V supply. This facilitates low power system designs such as sleep mode and pager mode where only 3.3V is available. The G570 incorporates a reset function, selectable by one of two inputs, to help alleviate system errors. The reset function enables PC card initialization concurrent with host platform initialization, allowing a system reset. Reset is accomplished by grounding the VCC and VPP (flash-memory programming voltage) outputs, which discharges residual card voltage. End equipment for the G570 includes notebook computers, desktop computers, personal digital assistants (PDAs), digital cameras and bar-code scanners.
Application
Notebook PC Electronic Dictionary Personal Digital Assistance Digital still Camera
Ordering Information
PART NUMBER
G570S4 G570SA
TEMP. RANGE
-40C to +85C -40C to +85C
PACKAGE
28 SSOP 30 SSOP
Pin Information
G570
5V DATA CLOCK LATCH RESET 12V AVPP AVCC AVCC AVCC GND NC RESET 3.3V 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 5V 5V NC NC NC 12V BVPP BVCC BVCC BVCC NC OC 3.3V 3.3V 5V 5V DATA CLOCK LATCH RESET 12V AVPP AVCC AVCC AVCC GND NC RESET 3.3V 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
G570
30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 5V NC NC NC NC NC 12V BVPP BVCC BVCC BVCC NC OC 3.3V 3.3V
28Pin SSOP 30Pin SSOP
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Global Mixed-mode Technology Inc.
Absolute maximum ratings over operating free-air temperature (unless otherwise noted)*
Input voltage range for card power: VI(3.3V)...................................................-0.3V to 7V VI(5V)....................................................-0.3V to 7V VI(12V) ............................................... -0.3V to 14V Logic input voltage......................................-0.3V to 7V
G570
Output current (each card): IO (xVCC)........................................internally limited IO(xVPP)............................................. internally limited Operating virtual junction temperature range, TJ .......................................................-40C to 150C Operating free-air temperature range, TA .......................................................-40C to 85C Storage temperature range, TSTG..........-55C to 150C
*Stresses beyond those listed under "absolute maximum ratings"may cause permanent damage to the device. These are stress rating only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions"is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Recommended Operating Conditions
Min
VI (5V) Input voltage range, VI VI (3.3V) VI (12V) IO (xVCC) at 25C IO (xVPP) at 25C 0 0 0
Max
5.25 5.25 13.5 1 150 2.5 125
Unit
V V V A mA MHz C
Output current
Clock frequency Operating virtual junction temperature, TJ
0 -40
Typical PC Card Power-Distribution Application
Power Supply
12V 5V 3.3V 12V 5V 3.3V RESET RESET 3
G570
AVPP AVCC AVCC AVCC
VPP1 VPP2 VCC VCC
PC Card A
Supervisor
BVPP Serial Interface BVCC OC BVCC BVCC
VPP1 VPP2 VCC VCC
PCMCIA Controller
PC Card B
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Terminal Functions
28 Pin TERMINAL NAME
3.3V 5V 12V AVCC AVPP BVCC BVPP CLOCK DATA GND LATCH NC
OC
G570
NO.
14,15,16 1,27,28 6,23 8,9,10 7 19,20,21 22 3 2 11 4 12,18,24,25,26 17 5 13
I/O
I I I O O O O I I I
DESCRIPTION
3.3V VCC input for card power 5V VCC input for card power and/or chip power 12V VPP input for card power Switched output that delivers 0V,3.3V,5V or high impedance to card Switched output that delivers 0V,3.3V,5V,12V or high impedance to card Switched output that delivers 0V, 3.3V, 5V or high impedance Switch output that delivers 0V, 3.3V, 5V, 12V or high impedance Logic-level clock for serial data word Logic-level serial data word Ground Logic level latch for serial data word No internal connection Logic-level overcurrent. OC reports output that goes low when an overcurrent condition exists Logic-level RESET input active high. Do not connect if terminal 13 is used. Logic-level RESET input active low. Do not connect if terminal 5 is used.
O I I
RESET
RESET
30 Pin TERMINAL NAME
3.3V 5V 12V AVCC AVPP BVCC BVPP CLOCK DATA GND LATCH NC
OC
NO.
15,16,17 1,2,30 7,24 9,10,11 8 20,21,22 23 4 3 12 5 13,19,25,26, 27,28,29 18 6 14
I/O
I I I O O O O I I I
DESCRIPTION
3.3V VCC input for card power 5V VCC input for card power and/or chip power 12V VPP input for card power Switched output that delivers 0V,3.3V,5V or high impedance to card Switched output that delivers 0V,3.3V,5V,12V or high impedance to card Switched output that delivers 0V, 3.3V, 5V or high impedance Switch output that delivers 0V, 3.3V, 5V, 12V or high impedance Logic level clock for serial data word Logic level serial data word Ground Logic level latch for serial data word No internal connection
O I I
Logic-level overcurrent. OC reports output that goes low when an overcurrent condition exists Logic-level RESET input active high. Do not connect if terminal 14 is used. Logic-level RESET input active low. Do not connect if terminal 6 is used.
RESET
RESET
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Electrical Characteristics (TA = 25C, VI(5V) = 5V; unless otherwise noted)
DC Characteristics PARAMETER
5V to x VCC 3.3V to x VCC 3.3V to x VCC 5V to x VPP 3.3V to x VPP 12V to x VPP VO(xVPP) Clamp low voltage VO(xVCC) Clamp low voltage IIKG Leakage current IPP at 10mA ICC at 10mA IPP high impedance State TA = 25C ICC high-impedance State TA = 25C VI(5V) = 5V VO(AVCC) = VO(BVCC) = 5V VO(AVPP) = VO(BVPP) = 12V VO(AVCC) = VO(BVCC) = 3.3V VI(5V) = 0V VI(3.3V) = 3.3V VO(AVPP) = VO(BVPP) = 0V Shutdown mode VO(BVCC) = VO(AVCC) =VO(AVPP) = VO(BVPP) = Hi-Z IO(xVCC) IO(xVPP) Output powered up into a short to GND 0.8 120 VI(5V) = 5V, VI(3.3V) =3.3V VI(5V) = 0V, VI(3.3V) =3.3V
G570
MIN TYP
170 140 150
TEST CONDITIONS
MAX UNIT
225 200 200 6 6 6 0.8 0.8 10 10 150 150 A m
Switch resistance*
V V A
1 1 115 131 2
II
Input current
IOS Short-circuit Output current Limit
2.2 400
A mA
*Pulse-testing techniques are used to maintain junction temperature close to ambient temperatures; thermal effects must be taken into account separately.
Logic Section PARAMETER
Logic input current Logic input high level Logic input low level VI(5V) = 5V, IO = 1mA Logic output high level Logic output low level VI(5V) = 0V, IO = 1mA VI(3.3V)= 3.3V IO = 1mA VI(5V)0.4 VI(3.3V)0.4 0.4 V V 2 0.8
TEST CONDITION
MIN
MAX
1
UNIT
A V V
Switching Characteristics *, ** PARAMETER
tr tf Output rise time Output fall time VO (xVCC) VO (xVPP) VO (xVCC) VO (xVPP) LATCHto VO(xVPP) LATCHto VO(xVCC) (3.3V), VI(5V) = 5V LATCHto VO(xVCC) (5V) LATCHto VO(xVCC) (3.3V), VI(5V) = 0V
* Refer to Parameter Measurement Information **Switching Characteristics are with CL = 147F
TEST CONDITION
MIN
TYP
2 10 16 45
MAX
UNIT
ms
tpd
Propagation delay (see Figure 1)
ton toff ton toff ton toff ton toff
7 30 5 16 3.2 25 6 21
ms ms ms ms ms ms ms ms
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Parameter Measurement Information
VPP CL VCC CL
G570
LOAD CIRCUIT
50% LATCH toff ton VO(xVPP) 90% 10%
LOAD CIRCUIT
VDD 50% GND LATCH toff VI(12V) VO(xVCC) GND ton 90% 10% GND VI(5V) GND VDD
VOLTAGE WAVEFORMS
VOLTAGE WAVEFORMS
Figure 1. Test Circuits and Voltage Waveforms
Table of Timing Diagrams
DATA
D8
D7
D6
D5
D4
D3
D2
D1
D0
LATCH
CLOCK
Note:Data is clocked in on the positive leading edge of the clock. The latch should occur before the next positive leading edge of the clock. For definition of D0 to D8, see the control logic table. Figure 2. Serial-Interface Timing
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Switching Characteristics
G570
Switching Characteristics
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G570
Switching Characteristics
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Application Information
Overview PC Cards were initially introduced as a means to add EEPROM (flash memory) to portable computers with limited on-board memory. The idea of add-in cards quickly took hold; modems, wireless LANs, Global Positioning Satellite (GPS), multimedia, and hard-disk versions were soon available. As the number of PC Card applications grew, the engineering community quickly recognized the need for a standard to ensure compatibility across platforms. To this end, the PCMCIA was established, comprised of members from leading computer, software, PC Card, and semiconductor manufactures. One key goal was to realize the "plug-and play" concept. Cards and hosts from different vendors should be compatible--able to communicate with one another transparently. PC Card Power Specification System compatibility also means power compatibility. The most current set of specifications (PC Card Standard) set forth by the PCMCIA committee states that power is to be transferred between the host and the card through eight of the 68 terminals of the PC Card connector. This power interface consists of two VCC, two VPP, and four ground terminals. Multiple VCC and ground terminals minimize connector-terminal and line resistance. The two VPP terminals were originally specified as separate signals but are commonly tied together in the host to form a single node to minimize voltage losses. Card primary power is supplied through the VCC terminals; flash-memory programming and erase voltage is supplied through the VPP terminals. Overcurrent and Over-Temperature Protection PC Cards are inherently subject to damage that can result from mishandling. Host systems require protection against short-circuited cards that could lead to power supply or PCB-trace damage. Even systems robust enough to withstand a short circuit would still undergo rapid battery discharge into the damaged PC Card, resulting in the rather sudden and unacceptable loss of system power. Most hosts include fuses for protection. However, the reliability of fused systems is poor, as blown fuses require troubleshooting and repair, usually by the manufacturer. The G570 takes a two-pronged approach to overcurrent protection. First, instead of fuses, sense FETs monitor each of the power outputs. Excessive current generates an error signal that linearly limits the output current, preventing host damage or failure. Sense FETs, unlike sense resistors or polyfuses, have an added advantage in that they do not add to the series
G570
resistance of the switch and thus produce no additional voltage losses. Second, when an overcurrent condition is detected, the G570 asserts a signal at OC that can be monitored by the microprocessor to initiate diagnostics and/or send the user a warning message. In the event that an overcurrent condition persists, causing the IC to exceed its maximum junction temperature, thermal-protection circuitry activates, shutting down all power outputs until the device cools to within a safe operating region. 12V Supply Not Required Most PC Card switches use the externally supplied 12V VPP power for switch-gate drive and other chip functions, which requires that power be present at all times. The G570 offers considerable power savings by using an internal charge pump to generate the required higher voltages from 5V or 3.3V input; therefore, the external 12V supply can be disable except when needed for flash-memory functions, thereby extending battery lifetime. Do not ground the 12V input if the 12V input is not used. Additional power savings are realized by the G570 during a software shutdown in which quiescent current drops to a typical of 2A. 3.3V Low Voltage Mode The G570 operates in 3.3V low voltage mode when 3.3V is the only available input voltage (VI(5V)=0).This allows host and PC Cards to be operated in low power 3.3V only modes such as sleep modes or pager modes. Note that in this operation mode, the G570 derives its bias current from the 3.3V input pin and only 3.3V can be delivered to the Card. The 3.3V switch resistance increases, but the added switch resistance should not be critical, because only a small amount of current is delivered in this mode. Voltage Transitioning Requirement PC Cards, like portables, are migrating from 5V to 3.3V to minimize power consumption, optimize board space, and increase logic speeds. The G570 is designed to meet all combinations of power delivery as currently defined in the PCMCIA standard. The latest protocol accommodates mixed 3.3V/5V systems by first powering the card with 5V, then polling it to determine its 3.3V compatibility. The PCMCIA specification requires that the capacitors on 3.3V compatible cards be discharged to below 0.8 V before applying 3.3V power. This ensures that sensitive 3.3V circuitry is not subjected to any residual 5V charge and functions as a power reset. The G570 offer a selectable VCC and VPP ground state, in accordance with PCMCIA 3.3V/5V switching specifications, to fully discharge the card capacitors while switching between VCC voltage.
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Output Ground Switches Several PCMCIA power distribution switches on the market do not have an active grounding FET switch. These devices do not meet the PC Card specification requiring a discharge of VCC within 100ms. PC Card resistance can not be relied on to provide a discharge path for voltages stored on PC Card capacitance because of possible high impedance isolation by power management schemes. A method commonly shown to alleviate this problem is to add to the switch output an external 100k resistor in parallel with the PC Card. Considering that this is the only discharge path to ground, a timing analysis show that the RC time constant delays the required discharge time to more than 2 seconds. The only way to ensure timing compatibility with PC Card standards is to use a power-distribution switch that has an internal ground switch, like that of the G570, or add an external ground FET to each of the output lines with the control logic necessary to select it. In summary, the G570 is a complete single-chip dual-slot PC Card power interface. It meets all currently defined PCMCIA specifications for power delivery in 5V, 3.3V, and mixed systems, and offers a serial control interface. The G570 offers functionality, power savings, overcurrent and thermal protection, and fault reporting in one 30 pin SSOP surface-mount package for maximum value added to new portable designs. Power Supply Considerations The G570 has multiple pins for each of its 3.3V, 5V, and 12V power inputs and for switched VCC outputs. Any individual pin can conduct the rated input or output current. Unless all pins are connected in parallel, the series resistance is significantly higher than that specified, resulting in increased voltage drops and lost power. Both 12V inputs must be connected for proper VPP switching; it is recommended that all input and output power pins be paralleled for optimum operation. Although the G570 is fairly immune to power input fluctuations and noise, it is generally considered good design practice to bypass power supplies typically with a 1F electrolytic or tantalum capacitor paralleled by a 0.047F to 0.1F ceramic capacitor. It is strongly recommended that the switched VCC and VPP outputs be bypassed with a 0.1F or larger capacitor; doing so improves the immunity of the G570 to electrostatic discharge (ESD). Care should be taken to minimize the inductance of PCB traces between the G570 and the load. High switching currents can produce large negative-voltage transients, which forward biases substrate diodes, resulting in unpredictable performance. Similarly, no pin should be taken below -0.3V.
G570
RESET or RESET Inputs To ensure that cards are in a known state after power brownouts or system initialization, the PC Cards should be reset at the same time as the host by applying a low impedance to the VCC and VPP terminals. A low impedance output state allows discharging of residual voltage remaining on PC Card filter capacitance, permitting the system (host and PC Cards) to be powered up concurrently. The RESET or RESET input closes internal switches S1, S4, S7, and S10 with all other switches left open (see G570 control logic table). The G570 remains in the low impedance output state until the signal is deasserted and further data is clocked in and latched. RESET or RESET is provided for direct compatibility with systems that use either an active-low or active-high reset voltage supervisor. The unused pin is internally pulled up or down and should be left unconnected. Overcurrent and Thermal Protection The G570 uses sense FETs to check for overcurrent conditions in each of the VCC and VPP outputs. Unlike sense resistors or polyfuses, these FETs do not add to the series resistance of the switch; therefore, voltage and power losses are reduced. Overcurrent sensing is applied to each output separately. When an overcurrent condition is detected, only the power output affected is limited; all other power outputs continue to function normally. The OC indicator, normally a logic high, is a logic low when any overcurrent condition is detected, providing for initiation of system diagnostics and/or sending a warning message to the user. During power up, the G570 controls the rise time of the VCC and VPP outputs and limits the current into a faulty card or connector. If a short circuit is applied after power is established (e.g., hot insertion of a bad card), current is initially limited only by the impedance between the short and the power supply. In extreme cases, as much as 10A to 15A may flow into the short before the current limiting of the G570 engages. If the VCC or VPP outputs are driven below ground, the G570 may latch nondestructively in an off state. Cycling power will reestablish normal operation. Overcurrent limiting for the VCC outputs is designed to activate, if powered up, into a short in the range of 0.8A to 2.2A. The VPP outputs limit from 120mA to 400mA. The protection circuitry acts by linearly limiting the current passing through the switch rather than initiating a full shutdown of the supply. Shutdown occurs only during thermal limiting. Thermal limiting prevents destruction of the IC from overheating if the package power-dissipation ratings are exceeded. Thermal limiting disables all power outputs (both A and B slots) until the device has cooled.
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Logic Input and Outputs The serial interface consists of DATA, CLOCK, and LATCH leads. The data is clocked in on the positive leading edge of the clock (see Figure 2). The 9-bit (D0 through D8) serial data word is loaded during the positive edge of the latch signal. The latch signal should occur before the next positive leading edge of the block. The shutdown bit of the data word places all VCC and VPP outputs in a high-impedance state and reduces chip qui-
G570
escent current to 2A to conserve battery power. The G570 serial interface is designed to be compatible with serial-interface PCMCIA controllers and current PCMCIA and Japan Electronic Industry Development Association (JEIDA) standards. An overcurrent output ( OC ) is provided to indicate an overcurrent condition in any of the VCC or VPP outputs as previously discussed.
G570
Card A S7 S8 S1 S2 3.3V 3.3V 3.3V S4 S5 5V 5V 5V 12V 12V See Note A cs S6 S10 S11 S12 VPP1 VPP2 S3 cs cs See Note A S9 VCC VCC VPP1 VPP2
Card B cs VCC VCC
Internal Current Monitor Supervisor RESET RESET DATA CLOCK LATCH OC } Serial Interface Thermal
Controller
CPU
GND
NOTE:MOSFET switches S9 and S12 have a back-gate diode from the source to the drain. Unused switch inputs should never be grounded. Figure 3 Internal Switching Matrix
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G570 control logic
AVPP CONTROL SIGNALS
D8 SHDN 1 1 1 1 0 D0 A_VPP_PGM 0 0 1 1 x D1 A_VPP_VCC 0 1 0 1 x
G570
OUTPUT
VAVPP 0V VCC* VPP(12 V) Hi-Z Hi-Z S8 OPEN CLOSED OPEN OPEN OPEN S9 OPEN OPEN CLOSED OPEN OPEN
INTERNAL SWITCH SETTING
S7 CLOSED OPEN OPEN OPEN OPEN
BVPP CONTROL SIGNALS
D8 SHDN 1 1 1 1 0 D4 B_VPP_PGM 0 0 1 1 x D5 B_VPP_VCC 0 1 0 1 x
INTERNAL SWITCH SETTING
S10 CLOSED OPEN OPEN OPEN OPEN S11 OPEN CLOSED OPEN OPEN OPEN S12 OPEN OPEN CLOSED OPEN OPEN
OUTPUT
VBVPP 0V VCC** VPP(12V) Hi-Z Hi-Z
AVCC CONTROL SIGNALS
D8 SHDN 1 1 1 1 0 D3 A _ BCC3 0 0 1 1 x D2 A _ VCC5 0 1 0 1 x
INTERNAL SWITCH SETTING
S1 CLOSED OPEN OPEN CLOSED OPEN S2 OPEN CLOSED OPEN OPEN OPEN S3 OPEN OPEN CLOSED OPEN OPEN
OUTPUT
VAVCC 0V 3.3V 5V 0V Hi-Z
BVCC CONTROL SIGNALS
D8 SHDN 1 1 1 1 0
*Output depends on AVCC **Output depends on BVCC
INTERNAL SWITCH SETTING
D7 B _ VCC5 0 1 0 1 x S4 CLOSED OPEN OPEN CLOSED OPEN S5 OPEN CLOSED OPEN OPEN OPEN S6 OPEN OPEN CLOSED OPEN OPEN
OUTPUT
VBVCC 0V 3.3V 5V 0V Hi-Z
D6 B _ VCC3 0 0 1 1 x
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ESD Protection
All G570 inputs and outputs incorporate ESD-protection circuitry designed to withstand a 2kV human-body-model discharge as defined in MIL-STD-883C, Method 3015. The VCC and VPP out-
G570
puts can be exposed to potentially higher discharges from the external environment through the PC Card connector. Bypassing the outputs with 0.1F capacitors protects the devices from discharges up to 10 kV.
AVCC AVCC 12V 0.1F (Ceramic) 1F 12V 12V AVCC BVCC BVCC BVCC 0.1F 0.1F
VCC VCC VPP1 VPP2 PC Card Connector A
VCC VCC VPP1 VPP2 PC Card Connector B
5V 0.1F (Ceramic) 3.3V 0.1F (Ceramic) 1F 1F
5V 5V 5V 3.3V 3.3V 3.3V
G570
AVPP AVPP BVPP BVPP DATA CLOCK LATCH RESET RESET OC System Voltage Supervisor or PCI Bus Reset To CPU 0.1F 0.1F
DATA CLOCK LATCH PCMCIA Controller
GND CS Shutdown Signal From CPU
Figure 4. Detailed Interconnections and Capacitor Recommendations
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G570 28Pin Package
C
L
G570
E1 E
h x 45
D
A2
0.004 C
A A1
SEATING PLANE e b
SYMBOL
A A1 A2 b c e D E E1 L JEDEC
MIN.
0.05 1.65 0.22 0.09 9.90 7.40 5.00 0.55 0
DIMENSION IN MM NOM.
MAX.
2.0
MIN.
0.002
DIMENSION IN INCH NOM.
MAX.
0.079
1.75 0.30 0.15 0.65 BASIC 10.20 7.80 5.30 0.75 4
1.85 0.33 0.21 10.50 8.20 5.60 0.95 8 MO-150 (AH)
0.065 0.009 0.004 0.390 0.291 0.197 0.022 0
0.069 0.012 0.006 0.026 BASIC 0.402 0.307 0.209 0.030 4
0.073 0.013 0.008 0.413 0.323 0.220 0.038 8
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G570 30Pin Package
G570
c L1 L
D
E1 1.15
E
3.6
A1
A
e
b
A2
Note: 1. Dimensional tolerance 0.10mm 2. Plating thickness 5~15m 3. Dimensions "D" does not include burrs, however dimension including protrusions or gate burrs Shall be MAX. 0.20mm 4. Dimension "E1" does not include inter-lead flash or protrusion. Inter-lead flash or protrusion small not exceeds 0.25 per side. SYMBOL
A A1 A2 b C D E E1 L1 L e
MIN.
1.80 0.05 1.75 0.25 0.10 10.10 7.50 5.20 0.53 1.10 1
DIMENSION IN MM NOM.
1.90 0.10 1.80 0.30 0.15 10.15 ----5.25 0.68 1.20 0.65 BSC 4
MAX.
2.00 0.15 1.85 0.35 0.20 10.20 7.90 5.30 0.83 1.30 7
MIN.
0.071 0.002 0.069 0.010 0.004 0.398 0.295 0.205 0.021 0.043 1
DIMENSION IN INCH NOM.
0.075 0.004 0.071 0.012 0.006 0.400 ----0.207 0.027 0.047 0.026BSC 4
MAX.
0.079 .006 0.073 0.014 0.008 .402 0.311 0.209 0.033 0.051 7
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